Chips, Memory, and Power | Pat Gelsinger
The a16z Show
5 HOURS AGO
Chips, Memory, and Power | Pat Gelsinger
Chips, Memory, and Power | Pat Gelsinger

The a16z Show
5 HOURS AGO
Pat Gelsinger joins Raghu Raghuram and Guido Appenzeller to examine the physical limits of AI infrastructure, from chip design and memory to networking, power, and agent-oriented computing.
The episode traces semiconductor progress from Intel’s pre-EDA design era to AI-assisted chip development, then follows the bottlenecks that automation cannot remove: manufacturing, packaging, memory bandwidth, thermal management, networking, and energy. Gelsinger argues that today’s proliferation of specialized AI chips will eventually narrow as workloads, software, capital, and power constraints favor scalable platforms. The conversation also explores new memory architectures, optical interconnects, power delivery, cooling, superconducting technology, and how virtualization might be redesigned for autonomous agents under human-defined policies.
00:00
00:00
Energy capacity equals economic capacity
08:58
08:58
AI design is only the beginning
16:09
16:09
Extreme specialization may not survive changing workloads
24:47
24:47
AI is a memory workload
36:31
36:31
Optics becomes necessary at scale
46:02
46:02
Energy is an upper bound on AI growth
51:13
51:13
Humans are more patient than agents